Commit 2024-07-21 23:44 a5fb11c5
View on Github →feat (Algebra/Order/AddTorsor) : Antidiagonals for SMul and VAdd, with finiteness properties (#14479) We introduce antidiagonals for scalar multiplication and vector addition, and show that they are finite for partially well-ordered input sets. We also add some results involving minima. This will be used in future PRs on Hahn modules and vertex operators.
- depends on: #14732